HardwareSoftwareInterface.cs

The HardwareSoftwareInterface class shows how the ToplevelHardware class is used by the software.

Code

using System;
using System.Collections.Generic;
using System.Text;
using RapidHDL;

namespace SimpleCounter
{
    class HardwareSoftwareInterface
    {
        ToplevelHardware oHardware;

        public bool LoadHardware()
        {
            oHardware = new ToplevelHardware();
            oHardware.StartRapidHardware();
            return true;
        }

        public void StepClock()
        {
            oHardware.FPGAInterface.Go(1);
        }

        public void Reset()
        {
            oHardware.FPGAInterface.Reset();
        }

        public void SetEnable(bool bEnable)
        {
            SignalSource oEnable = oHardware.SystemInterface.GetSignalSource("I_ENABLE");
            if (bEnable)
                oEnable.ValueAsInt = 1;
            else
                oEnable.ValueAsInt = 0;

        }

        public int ReadCounter()
        {
            string sValue = oHardware.SystemInterface.GetSignalView("O_COUNT").FormattedValue;
            return System.Convert.ToInt32(sValue);
        }

        public void ViewHardware()
        {
            oHardware.LaunchGUI(false);
        }

    }
}

Declaring ToplevelHardware

The oHardware object variable has type ToplevelHardware.

        ToplevelHardware oHardware;

StartRapidHardware() - Starting the Hardware

A simple LoadHardware() routine first instantiates the TopLevelHardware object. Second, it invokes the StartRapiHardware() method of the RapidHardware base class.

        public bool LoadHardware()
        {
            oHardware = new ToplevelHardware();
            oHardware.StartRapidHardware();
            return true;
        }

StartRapidHardware() does all the work of RapidHDL, including:
* building the component hirarchy by invoking GenerateStructure() for all the child components.
* validating the hardware structure is well formed and does not violate RTL rules
* generating the Verilog
* generating support files, test scripts, synthesis scripts, etc.
* running unit tests using Verilog simulator if requested
* transferring generated files to a remote build server
* synthesizing the hardware by invoking the Xilinx ISE toolchain
* loading a synthesized bitfile into an FGPA
* resetting and initializing an FPGA
* connecting the FPGA to software

The exact work done by StartRapidHardware() will depend on the settings defined in the ToplevelHardware. StartRapidHardware() can take a few minutes to run for large designs.

FPGAInterface class

The FPGAInterface class is available as part of a RapidHardware class. This class handles interactions with the FPGA (or built in simulator).

Step Clock

When the FPGA starts, it is paused. The FPGA Interface contains a Go() method that receives a specified number of clock cycles as parameter. To single step the clock, call this method with 1 as the input.

        public void StepClock()
        {
            oHardware.FPGAInterface.Go(1);
        }

Reset

The reset function of the FPGAInterface class causes the MainReset signal to be asserted high for a few clock cycles.

        public void Reset()
        {
            oHardware.FPGAInterface.Reset();
        }

Setting a Signal Source

The SystemInterface class is used to retreive the SignalSource object for the "I_ENABLE" signal source. Setting the value of the SignalSource object causes the signal to be changed in the FPGA.

        public void SetEnable(bool bEnable)
        {
            SignalSource oEnable = oHardware.SystemInterface.GetSignalSource("I_ENABLE");
            if (bEnable)
                oEnable.ValueAsInt = 1;
            else
                oEnable.ValueAsInt = 0;
        }

Reading a Signal Value

The SystemInterface class is used to get the "O_COUNT" SignalView object and the formatted value is returned as a string. The string is converted to an integer.

        public int ReadCounter()
        {
            string sValue = oHardware.SystemInterface.GetSignalView("O_COUNT").FormattedValue;
            return System.Convert.ToInt32(sValue);
        }

Viewing and Debugging Hardware

The RapidHDL library includes a Hardware View user interface that reports all the internals of a hardware, including:
  • Logs and error messages
  • Component Hirarchy and Generated Verilog
  • Signal Source Values (which may be edited)
  • Signal View Values
  • Control of the clock
  • Test Scripts and Results
  • Object Properties

The Hardware View window can be launched by calling the RapidHardware object's LaunchGUI() class. LaunchGUI() takes a parameter that should be 'false' unless the window is launched from a single threaded console application.

        public void ViewHardware()
        {
            oHardware.LaunchGUI(false);
        }

FMain.cs

The main window that launches when the program is executed is defined in FMain.cs. This form is quite basic and includes text boxes for reporting the count and controlling the clock. This form interacts with HardwareSoftwareInterface.cs exactly as one might expect, so it will not be discussed in depth here.

Last edited Sep 10, 2009 at 6:07 AM by allen248, version 2

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